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author	Jan Beulich <jbeulich@suse.com>
	Mon, 18 Nov 2024 10:45:50 +0000 (11:45 +0100)
committer	Jan Beulich <jbeulich@suse.com>
	Mon, 18 Nov 2024 10:45:50 +0000 (11:45 +0100)
commit	497ee27a74891575c51a5857f23cdaac30f513f6
tree	ceeb3b8115a349c1b52c3bb99e97cabbdec71b33	tree
parent	3c17b69fa1ac3b5c820caf5431532aa79e1e28cf	commit \| diff

x86: VP2INTERSECT{D,Q} have mask register destination group

Much like AVX512-{4FMAPS,4VNNIW} have a constraint on their register
source, there's a constraint (need to be even) on the destination
register here.

Adjust "good" test cases accordingly, and add a new test case to check
the warning.

18 files changed:

gas/config/tc-i386.c		diff \| blob \| blame \| history
gas/testsuite/gas/i386/arch-15.d		diff \| blob \| blame \| history
gas/testsuite/gas/i386/arch-15.s		diff \| blob \| blame \| history
gas/testsuite/gas/i386/i386.exp		diff \| blob \| blame \| history
gas/testsuite/gas/i386/vp2intersect-intel.d		diff \| blob \| blame \| history
gas/testsuite/gas/i386/vp2intersect-inval-bcast.s		diff \| blob \| blame \| history
gas/testsuite/gas/i386/vp2intersect-warn.l	[new file with mode: 0644]	blob
gas/testsuite/gas/i386/vp2intersect-warn.s	[new file with mode: 0644]	blob
gas/testsuite/gas/i386/vp2intersect.d		diff \| blob \| blame \| history
gas/testsuite/gas/i386/vp2intersect.s		diff \| blob \| blame \| history
gas/testsuite/gas/i386/x86-64-arch-5.d		diff \| blob \| blame \| history
gas/testsuite/gas/i386/x86-64-arch-5.s		diff \| blob \| blame \| history
gas/testsuite/gas/i386/x86-64-vp2intersect-intel.d		diff \| blob \| blame \| history
gas/testsuite/gas/i386/x86-64-vp2intersect-inval-bcast.s		diff \| blob \| blame \| history
gas/testsuite/gas/i386/x86-64-vp2intersect.d		diff \| blob \| blame \| history
gas/testsuite/gas/i386/x86-64-vp2intersect.s		diff \| blob \| blame \| history
opcodes/i386-opc.tbl		diff \| blob \| blame \| history
opcodes/i386-tbl.h		diff \| blob \| blame \| history

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