]> git.ipfire.org Git - thirdparty/gcc.git/commit
RISC-V: Reconcile the existing test for vdiv.vx combine
authorPan Li <pan2.li@intel.com>
Mon, 2 Jun 2025 13:21:18 +0000 (21:21 +0800)
committerPan Li <pan2.li@intel.com>
Tue, 3 Jun 2025 14:15:46 +0000 (22:15 +0800)
commit4c2d94aed41778226ae08c718459eed5ee65d455
tree835657b9dd368b7a50c4a172c88f5ac983d891d1
parent661c7377df05010ffae8a81c17b3870f8d927608
RISC-V: Reconcile the existing test for vdiv.vx combine

Some existing vdiv related test need some adjust for the
asm check.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/binop/vdiv-rv32gcv-nofm.c: Adjust
the asm check for vdiv.
* gcc.target/riscv/rvv/autovec/binop/vdiv-rv32gcv.c: Ditto.
* gcc.target/riscv/rvv/autovec/binop/vdiv-rv64gcv-nofm.c: Ditto.
* gcc.target/riscv/rvv/autovec/binop/vdiv-rv64gcv.c: Ditto.

Signed-off-by: Pan Li <pan2.li@intel.com>
gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vdiv-rv32gcv-nofm.c
gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vdiv-rv32gcv.c
gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vdiv-rv64gcv-nofm.c
gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vdiv-rv64gcv.c