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(parent: b96e319) | patch
RISC-V: Reconcile the existing test for vrem.vx combine
authorPan Li <pan2.li@intel.com>
Sun, 8 Jun 2025 08:50:52 +0000 (16:50 +0800)
committerPan Li <pan2.li@intel.com>
Mon, 9 Jun 2025 01:32:22 +0000 (09:32 +0800)
commit4df4acf002cc3672478edb43f374cef3ffbd1f54
tree6966c361fc5b3dfe9252a87ffb2ccf5af2600825tree
parentb96e319dbd19328a2243b2950155be57532c213bcommit | diff
RISC-V: Reconcile the existing test for vrem.vx combine

Some existing vrem related test need some adjust for the
asm check due to cost model.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/binop/vrem-rv32gcv.c: Adjust the
asm check for vrem.
* gcc.target/riscv/rvv/autovec/binop/vrem-rv64gcv.c: Ditto.

Signed-off-by: Pan Li <pan2.li@intel.com>
gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vrem-rv32gcv.c diff | blob | blame | history
gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vrem-rv64gcv.c diff | blob | blame | history
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