]> git.ipfire.org Git - thirdparty/qemu.git/commit
hw/riscv/riscv-iommu: Fix MSI table size limit
authorAndrew Jones <ajones@ventanamicro.com>
Thu, 4 Sep 2025 13:27:24 +0000 (08:27 -0500)
committerAlistair Francis <alistair.francis@wdc.com>
Thu, 2 Oct 2025 05:08:36 +0000 (15:08 +1000)
commit4f7528295b3e6dfe1189f660fa7865ad972d82e7
treedc6a702c5095d3570608e3c5ec53291be042e192
parent29b77c1a2db2d796bc3847852a5c8dc2a1e6e83b
hw/riscv/riscv-iommu: Fix MSI table size limit

The MSI table is not limited to 4k. The only constraint the table has
is that its base address must be aligned to its size, ensuring no
offsets of the table size will overrun when added to the base address
(see "8.5. MSI page tables" of the AIA spec).

Fixes: 0c54acb8243d ("hw/riscv: add RISC-V IOMMU base emulation")
Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Message-ID: <20250904132723.614507-2-ajones@ventanamicro.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
hw/riscv/riscv-iommu.c