]> git.ipfire.org Git - thirdparty/qemu.git/commit
hw/misc/aspeed_sdmc: Skipping dram_init in u-boot for AST2700
authorJamin Lin <jamin_lin@aspeedtech.com>
Wed, 18 Jun 2025 08:00:04 +0000 (16:00 +0800)
committerCédric Le Goater <clg@redhat.com>
Thu, 3 Jul 2025 11:41:57 +0000 (13:41 +0200)
commit51ac481bff88723ef4c101925082fab03bba200a
treec3d71e283097cd94fe0bd1090240d1164157d82a
parentc77283dd5d79149f4e7e9edd00f65416c648ee59
hw/misc/aspeed_sdmc: Skipping dram_init in u-boot for AST2700

On AST2700 SoC, QEMU now sets BIT6 in VGA0 SCRATCH register to indicate
that DDR training has completed, thus skipping the dram_init().

To align with the recent U-Boot changes, where the Main Control Register's
BIT16 is checked to skip the dram_init() process, this patch sets BIT16 in
the SDMC Main Control Register at reset time.

This allows both the main U-Boot stage to correctly detect and bypass DRAM
initialization when running under QEMU.

Reference:
- QEMU: https://github.com/qemu/qemu/commit/2d082fea485ee455a70ed3e963cdf9a70f34858a
- U-Boot: https://github.com/AspeedTech-BMC/u-boot/commit/94e5435504fb0d8888f5c1bfd3fa284cdd6aaf9b

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20250618080006.846355-2-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
hw/misc/aspeed_sdmc.c