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(parent: 8f1320e) | patch
RISC-V: Add vdiv.vx C API tests
authorJu-Zhe Zhong <juzhe.zhong@rivai.ai>
Fri, 3 Feb 2023 07:30:24 +0000 (15:30 +0800)
committerKito Cheng <kito.cheng@sifive.com>
Fri, 10 Feb 2023 11:27:04 +0000 (19:27 +0800)
commit5442df6cbdf32a53fd433b6248f11a54c9ecb900
tree6b7a3b9b44df92e116c7a20bad691b6bb9e76f84tree
parent8f1320e09764a5855a4eaaafdd9134d6d0be8b1dcommit | diff
RISC-V: Add vdiv.vx C API tests

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/base/vdiv_vx_m_rv32-1.c: New test.
* gcc.target/riscv/rvv/base/vdiv_vx_m_rv32-2.c: New test.
* gcc.target/riscv/rvv/base/vdiv_vx_m_rv32-3.c: New test.
* gcc.target/riscv/rvv/base/vdiv_vx_m_rv64-1.c: New test.
* gcc.target/riscv/rvv/base/vdiv_vx_m_rv64-2.c: New test.
* gcc.target/riscv/rvv/base/vdiv_vx_m_rv64-3.c: New test.
* gcc.target/riscv/rvv/base/vdiv_vx_mu_rv32-1.c: New test.
* gcc.target/riscv/rvv/base/vdiv_vx_mu_rv32-2.c: New test.
* gcc.target/riscv/rvv/base/vdiv_vx_mu_rv32-3.c: New test.
* gcc.target/riscv/rvv/base/vdiv_vx_mu_rv64-1.c: New test.
* gcc.target/riscv/rvv/base/vdiv_vx_mu_rv64-2.c: New test.
* gcc.target/riscv/rvv/base/vdiv_vx_mu_rv64-3.c: New test.
* gcc.target/riscv/rvv/base/vdiv_vx_rv32-1.c: New test.
* gcc.target/riscv/rvv/base/vdiv_vx_rv32-2.c: New test.
* gcc.target/riscv/rvv/base/vdiv_vx_rv32-3.c: New test.
* gcc.target/riscv/rvv/base/vdiv_vx_rv64-1.c: New test.
* gcc.target/riscv/rvv/base/vdiv_vx_rv64-2.c: New test.
* gcc.target/riscv/rvv/base/vdiv_vx_rv64-3.c: New test.
* gcc.target/riscv/rvv/base/vdiv_vx_tu_rv32-1.c: New test.
* gcc.target/riscv/rvv/base/vdiv_vx_tu_rv32-2.c: New test.
* gcc.target/riscv/rvv/base/vdiv_vx_tu_rv32-3.c: New test.
* gcc.target/riscv/rvv/base/vdiv_vx_tu_rv64-1.c: New test.
* gcc.target/riscv/rvv/base/vdiv_vx_tu_rv64-2.c: New test.
* gcc.target/riscv/rvv/base/vdiv_vx_tu_rv64-3.c: New test.
* gcc.target/riscv/rvv/base/vdiv_vx_tum_rv32-1.c: New test.
* gcc.target/riscv/rvv/base/vdiv_vx_tum_rv32-2.c: New test.
* gcc.target/riscv/rvv/base/vdiv_vx_tum_rv32-3.c: New test.
* gcc.target/riscv/rvv/base/vdiv_vx_tum_rv64-1.c: New test.
* gcc.target/riscv/rvv/base/vdiv_vx_tum_rv64-2.c: New test.
* gcc.target/riscv/rvv/base/vdiv_vx_tum_rv64-3.c: New test.
* gcc.target/riscv/rvv/base/vdiv_vx_tumu_rv32-1.c: New test.
* gcc.target/riscv/rvv/base/vdiv_vx_tumu_rv32-2.c: New test.
* gcc.target/riscv/rvv/base/vdiv_vx_tumu_rv32-3.c: New test.
* gcc.target/riscv/rvv/base/vdiv_vx_tumu_rv64-1.c: New test.
* gcc.target/riscv/rvv/base/vdiv_vx_tumu_rv64-2.c: New test.
* gcc.target/riscv/rvv/base/vdiv_vx_tumu_rv64-3.c: New test.
36 files changed:
gcc/testsuite/gcc.target/riscv/rvv/base/vdiv_vx_m_rv32-1.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vdiv_vx_m_rv32-2.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vdiv_vx_m_rv32-3.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vdiv_vx_m_rv64-1.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vdiv_vx_m_rv64-2.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vdiv_vx_m_rv64-3.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vdiv_vx_mu_rv32-1.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vdiv_vx_mu_rv32-2.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vdiv_vx_mu_rv32-3.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vdiv_vx_mu_rv64-1.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vdiv_vx_mu_rv64-2.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vdiv_vx_mu_rv64-3.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vdiv_vx_rv32-1.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vdiv_vx_rv32-2.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vdiv_vx_rv32-3.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vdiv_vx_rv64-1.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vdiv_vx_rv64-2.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vdiv_vx_rv64-3.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vdiv_vx_tu_rv32-1.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vdiv_vx_tu_rv32-2.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vdiv_vx_tu_rv32-3.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vdiv_vx_tu_rv64-1.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vdiv_vx_tu_rv64-2.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vdiv_vx_tu_rv64-3.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vdiv_vx_tum_rv32-1.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vdiv_vx_tum_rv32-2.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vdiv_vx_tum_rv32-3.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vdiv_vx_tum_rv64-1.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vdiv_vx_tum_rv64-2.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vdiv_vx_tum_rv64-3.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vdiv_vx_tumu_rv32-1.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vdiv_vx_tumu_rv32-2.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vdiv_vx_tumu_rv32-3.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vdiv_vx_tumu_rv64-1.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vdiv_vx_tumu_rv64-2.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vdiv_vx_tumu_rv64-3.c [new file with mode: 0644] blob
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