RISC-V: Enable vectorizable early exit testsuite

RISC-V: Enable vectorizable early exit testsuite

After we supported vectorizable early exit in RISC-V,  we would like to
enable the gcc vect test for vectorizable early test.

The vect-early-break_124-pr114403.c failed to vectorize for now.
Because that the __builtin_memcpy with 8 bytes failed to folded into
int64 assignment during ccp1.  We will improve that first and mark
this as xfail for RISC-V.

The below tests are passed for this patch:
1. The riscv fully regression tests.

gcc/testsuite/ChangeLog:

	* gcc.dg/vect/slp-mask-store-1.c: Add pragma novector as it will
	have 2 times LOOP VECTORIZED in RISC-V.
	* gcc.dg/vect/vect-early-break_124-pr114403.c: Xfail for the
	riscv backend.
	* lib/target-supports.exp: Add RISC-V backend.

Signed-off-by: Pan Li <pan2.li@intel.com>