]> git.ipfire.org Git - thirdparty/qemu.git/commit
target/arm: Add minimal RAS registers
authorRichard Henderson <richard.henderson@linaro.org>
Fri, 6 May 2022 18:02:31 +0000 (13:02 -0500)
committerPeter Maydell <peter.maydell@linaro.org>
Mon, 9 May 2022 10:47:53 +0000 (11:47 +0100)
commit58e93b48aa1b9f0e6de7e57f6f68b6dda7a8198a
tree37f5a9846de2a4c01ddf017cd4cd2694766afcc2
parent8fc756b6be0d0de777b2092d324907ced7365543
target/arm: Add minimal RAS registers

Add only the system registers required to implement zero error
records.  This means that all values for ERRSELR are out of range,
which means that it and all of the indexed error record registers
need not be implemented.

Add the EL2 registers required for injecting virtual SError.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220506180242.216785-14-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
target/arm/cpu.h
target/arm/helper.c