store-merging: Avoid ICEs on roughly ~0ULL/8 sized stores [PR105094]

store-merging: Avoid ICEs on roughly ~0ULL/8 sized stores [PR105094]

On the following testcase on 64-bit targets, store-merging sees
a MEM_REF store from {} ctor with "negative" bitsize where bitoff + bitsize
wraps around to very small end offset.  This later confuses the code
so that it allocates just a few bytes of memory but fills in huge amounts of
it.  Later on there is a param_store_merging_max_size size check but due to
the wrap-around we pass that.

The following patch punts on such large bitsizes.

2022-03-30  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/105094
	* gimple-ssa-store-merging.c (mem_valid_for_store_merging): Punt if
	bitsize <= 0 rather than just == 0.

	* gcc.dg/pr105094.c: New test.

(cherry picked from commit 387e818cda0ffde86f624228c3da1ab28f453685)