RISC-V: Disable misaligned vector access in hook riscv_slow_unaligned_access[PR115862]

RISC-V: Disable misaligned vector access in hook riscv_slow_unaligned_access[PR115862]

The reason is that in the following code, icode = movmisalignv8si has
already been rejected by TARGET_VECTOR_MISALIGN_SUPPORTED, but it is
allowed by targetm.slow_unaligned_access,which is contradictory.

(((icode = optab_handler (movmisalign_optab, mode))
	   != CODE_FOR_nothing)
	  || targetm.slow_unaligned_access (mode, align))

misaligned vector access should be enabled by -mno-vector-strict-align option.

	PR target/115862

gcc/ChangeLog:

	* config/riscv/riscv.cc (riscv_slow_unaligned_access): Disable vector misalign.

Signed-off-by: Li Xu <xuli1@eswincomputing.com>