]> git.ipfire.org Git - thirdparty/glibc.git/commit
Trigonometric optimizations for POWER cpus
authorAdhemerval Zanella <azanella@linux.vnet.ibm.com>
Fri, 17 Jun 2011 18:30:52 +0000 (13:30 -0500)
committerRyan S. Arnold <rsa@us.ibm.com>
Fri, 17 Jun 2011 19:12:07 +0000 (14:12 -0500)
commit6559b01648c2a08ea862ae923ce7d86c6e8cca45
tree456119f629e086a9a279edc57a440e912c20846f
parent4749a0058b27274a95c5a798e339c7299cdf890e
Trigonometric optimizations for POWER cpus

These optimizations remove most of the FP->INT conversions making
the computation done with FP operations instead. This eliminates
Load-Hit-Store (LHS) stalls on POWER, increasing performance of
hypot/hypotf (about 50% on POWER7, 25% on POWER6, and 30% on POWER5)
and sinf/cosf (30% on POWER7, 15% on POWER6, and 10% on POWER5).
(cherry picked from commit 5939fc0867e1616a537c26d84ca1612b53b0303e)
15 files changed:
ChangeLog
sysdeps/powerpc/fpu/Makefile
sysdeps/powerpc/fpu/e_hypot.c [new file with mode: 0644]
sysdeps/powerpc/fpu/e_hypotf.c [new file with mode: 0644]
sysdeps/powerpc/fpu/e_rem_pio2f.c [new file with mode: 0644]
sysdeps/powerpc/fpu/k_cosf.c [new file with mode: 0644]
sysdeps/powerpc/fpu/k_sinf.c [new file with mode: 0644]
sysdeps/powerpc/fpu/s_cosf.c [new file with mode: 0644]
sysdeps/powerpc/fpu/s_float_bitwise.h [new file with mode: 0644]
sysdeps/powerpc/fpu/s_scalbnf.c [new file with mode: 0644]
sysdeps/powerpc/fpu/s_sinf.c [new file with mode: 0644]
sysdeps/powerpc/powerpc32/fpu/s_float_bitwise.S [new file with mode: 0644]
sysdeps/powerpc/powerpc32/power7/fpu/s_float_bitwise.S [new file with mode: 0644]
sysdeps/powerpc/powerpc64/fpu/s_float_bitwise.S [new file with mode: 0644]
sysdeps/powerpc/powerpc64/power7/fpu/s_float_bitwise.S [new file with mode: 0644]