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target/riscv/kvm: add zicsr, zifencei, zba, zbs, svnapot
authorDaniel Henrique Barboza <dbarboza@ventanamicro.com>
Tue, 31 Oct 2023 20:51:50 +0000 (17:51 -0300)
committerAlistair Francis <alistair.francis@wdc.com>
Tue, 7 Nov 2023 01:06:02 +0000 (11:06 +1000)
commit672ec6061f13af21cbfa560ab2c0eea1a600d950
treea636c8b098b6c651e220473e66a4c44a897bc1f2tree
parentb4ceb3f2f37bffab379c8aa531730d6ec31b9930commit | diff
target/riscv/kvm: add zicsr, zifencei, zba, zbs, svnapot

These regs were added in Linux 6.6.

Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20231031205150.208405-1-dbarboza@ventanamicro.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
target/riscv/kvm/kvm-cpu.c diff | blob | blame | history
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