]> git.ipfire.org Git - thirdparty/qemu.git/commit
hw/nvram/aspeed_otp: Add ASPEED OTP memory device model
authorKane-Chen-AS <kane_chen@aspeedtech.com>
Tue, 12 Aug 2025 09:39:58 +0000 (17:39 +0800)
committerCédric Le Goater <clg@redhat.com>
Mon, 29 Sep 2025 16:00:20 +0000 (18:00 +0200)
commit688a3dae7828ca5ee6f45d510eed083420d72d8a
tree5d0eaadaa2d119e3621fa4a4a1baa2d70c0966e1
parent4975b64efb5aa4248cbc3760312bbe08d6e71638
hw/nvram/aspeed_otp: Add ASPEED OTP memory device model

Introduce a QEMU device model for ASPEED's One-Time Programmable (OTP)
memory.

This model simulates a word-addressable OTP region used for secure
fuse storage. The OTP memory can operate with an internal memory
buffer.

The OTP model provides a memory-like interface through a dedicated
AddressSpace, allowing other device models (e.g., SBC) to issue
transactions as if accessing a memory-mapped region.

Signed-off-by: Kane-Chen-AS <kane_chen@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20250812094011.2617526-2-kane_chen@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
hw/nvram/aspeed_otp.c [new file with mode: 0644]
hw/nvram/meson.build
include/hw/nvram/aspeed_otp.h [new file with mode: 0644]