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i386: Emulate MMX ssse3_ph<plusminus_mnemonic>dv2si3 with SSE
authorhjl <hjl@138bc75d-0d04-0410-961f-82ee72b054a4>
Wed, 15 May 2019 15:23:11 +0000 (15:23 +0000)
committerhjl <hjl@138bc75d-0d04-0410-961f-82ee72b054a4>
Wed, 15 May 2019 15:23:11 +0000 (15:23 +0000)
commit68c094e52005e38eb851cc2b635b4def4427fd67
tree1a88a668e8c0e8e40c14a6f04d9ab80bf8203313tree
parente8d36527ccc4c28ecadda51ebc19471edf5f800ccommit | diff
i386: Emulate MMX ssse3_ph<plusminus_mnemonic>dv2si3 with SSE

Emulate MMX ssse3_ph<plusminus_mnemonic>dv2si3 with SSE by moving bits
64:95 to bits 32:63 in SSE register.  Only SSE register source operand
is allowed.

PR target/89021
* config/i386/sse.md (ssse3_ph<plusminus_mnemonic>dv2si3):
Changed to define_insn_and_split to support SSE emulation.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@271242 138bc75d-0d04-0410-961f-82ee72b054a4
gcc/ChangeLog diff | blob | blame | history
gcc/config/i386/sse.md diff | blob | blame | history
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