RISC-V: Leverage vaadd.vv for signed standard name avg_ceil

RISC-V: Leverage vaadd.vv for signed standard name avg_ceil

The avg_ceil has the rounding mode towards +inf, while the
vaadd.vv has the rnu which totally match the sematics.  From
RVV spec, the fixed vaadd.vv with rnu,

roundoff_signed(v, d) = (signed(v) >> d) + r
r = v[d - 1]

For vaadd, d = 1, then we have

roundoff_signed(v, 1) = (signed(v) >> 1) + v[0]

If v[0] is bit 0, nothing need to do as there is no rounding.
If v[0] is bit 1, there will be rounding with 2 cases.

Case 1: v is positive.
  roundoff_signed(v, 1) = (signed(v) >> 1) + 1, aka round towards +inf
  roundoff_signed(2 + 3, 1) = (5 >> 1) + 1 = 3

Case 2: v is negative.
  roundoff_signed(v, 1) = (signed(v) >> 1) + 1, aka round towards +inf
  roundoff_signed(-9 + 2, 1) = (-7 >> 1) + 1 = -4 + 1 = -3

Thus, we can leverage the vaadd with rnu directly for avg_ceil.

The below test suites are passed for this patch series.
* The rv64gcv fully regression test.

gcc/ChangeLog:

	* config/riscv/autovec.md (avg<v_double_trunc>3_ceil): Add insn
	expand to leverage vaadd with rnu directly.

Signed-off-by: Pan Li <pan2.li@intel.com>