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* configure.tgt (target_cpu): Handle sparc and sparc64 & sparcv9.
authorebotcazou <ebotcazou@138bc75d-0d04-0410-961f-82ee72b054a4>
Mon, 13 Feb 2012 21:51:44 +0000 (21:51 +0000)
committerebotcazou <ebotcazou@138bc75d-0d04-0410-961f-82ee72b054a4>
Mon, 13 Feb 2012 21:51:44 +0000 (21:51 +0000)
commit6d2121e8df7e1fc32225c9908423144cad3a784c
tree6cd5ac5a27e75203a69a3315e21aea845631ab15tree
parent9a8d01ee90eeb9a2ec0ea7aac9b8925c1e4ac55ecommit | diff
* configure.tgt (target_cpu): Handle sparc and sparc64 & sparcv9.
* config/sparc/cacheline.h: New file.
* config/sparc/target.h: Likewise.
* config/sparc/sjlj.S: Likewise.
* config/linux/sparc/futex_bits.h: Likewise.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@184177 138bc75d-0d04-0410-961f-82ee72b054a4
libitm/ChangeLog diff | blob | blame | history
libitm/config/linux/sparc/futex_bits.h [new file with mode: 0644] blob
libitm/config/sparc/cacheline.h [new file with mode: 0644] blob
libitm/config/sparc/sjlj.S [new file with mode: 0644] blob
libitm/config/sparc/target.h [new file with mode: 0644] blob
libitm/configure.tgt diff | blob | blame | history
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