tcg/optimize: fix known-zero bits for right shift ops

tcg/optimize: fix known-zero bits for right shift ops

32-bit versions of sar and shr ops should not propagate known-zero bits
from the unused 32 high bits. For sar it could even lead to wrong code
being generated.

Cc: qemu-stable@nongnu.org
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
(cherry picked from commit e46b225a3137e62c975c49aaae7bb5f9583cc428)

Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>