]> git.ipfire.org Git - thirdparty/qemu.git/commit
tcg/ppc: Update vector support for v2.07 FP
authorRichard Henderson <richard.henderson@linaro.org>
Mon, 30 Sep 2019 03:59:46 +0000 (03:59 +0000)
committerRichard Henderson <richard.henderson@linaro.org>
Mon, 14 Oct 2019 14:10:33 +0000 (07:10 -0700)
commit7097312d37d3021cac9bb30a7f8c4660d2a25cd0
tree5d31bf9b5a355b73ef0c422c4746ed7c177c6f52
parentb2dda6400c1ef10b7918a7775997575b174062b3
tcg/ppc: Update vector support for v2.07 FP

These new instructions are conditional on MSR.FP when TX=0 and
MSR.VEC when TX=1.  Since we only care about the Altivec registers,
and force TX=1, we can consider these to be Altivec instructions.
Since Altivec is true for any use of vector types, we only need
test have_isa_2_07.

This includes moves to and from the integer registers.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
tcg/ppc/tcg-target.inc.c