AArch64: Fix copysign patterns

AArch64: Fix copysign patterns

The current copysign pattern has a mismatch in the predicates and constraints -
operand[2] is a register_operand but also has an alternative X which allows any
operand.  Since it is a floating point operation, having an integer alternative
makes no sense.  Change the expander to always use vector immediates which
results in better code and sharing of immediates between copysign and xorsign.

gcc/ChangeLog:

	* config/aarch64/aarch64.md (copysign<GPF:mode>3): Widen immediate to
	vector.
	(copysign<GPF:mode>3_insn): Use VQ_INT_EQUIV in operand 3.
	* config/aarch64/iterators.md (VQ_INT_EQUIV): New iterator.
	(vq_int_equiv): Likewise.

gcc/testsuite/ChangeLog:

	* gcc.target/aarch64/copysign_3.c: New test.
	* gcc.target/aarch64/copysign_4.c: New test.
	* gcc.target/aarch64/fneg-abs_2.c: Fixup test.
	* gcc.target/aarch64/sve/fneg-abs_2.c: Likewise.