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nvic: Handle ARMv6-M SCS reserved registers
authorJulia Suvorova <jusual@mail.ru>
Tue, 14 Aug 2018 16:17:19 +0000 (17:17 +0100)
committerPeter Maydell <peter.maydell@linaro.org>
Tue, 14 Aug 2018 16:17:19 +0000 (17:17 +0100)
commit7c9140afd594d7be73320ffaeb08210c59eaf168
tree62060d37104982ccf5bcad828567515395027c3ftree | snapshot
parentdef183446cebc0090f6d885383a6502302249f33commit | diff
nvic: Handle ARMv6-M SCS reserved registers

Handle SCS reserved registers listed in ARMv6-M ARM D3.6.1.
All reserved registers are RAZ/WI. ARM_FEATURE_M_MAIN is used for the
checks, because these registers are reserved in ARMv8-M Baseline too.

Signed-off-by: Julia Suvorova <jusual@mail.ru>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
hw/intc/armv7m_nvic.c diff | blob | blame | history
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