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(parent: 4148779) | patch
hw/intc/armv7m_nvic: Correct size of ICSR.VECTPENDING
authorPeter Maydell <peter.maydell@linaro.org>
Fri, 23 Jul 2021 16:21:45 +0000 (17:21 +0100)
committerPeter Maydell <peter.maydell@linaro.org>
Tue, 27 Jul 2021 09:57:39 +0000 (10:57 +0100)
commit7caad65756c0afaf4b238b068ab61481eb68a1dc
tree3867aea2a0de36d6596ead7eea4585261efcfa3ctree
parent41487794f5af977e992870e18521bed88daa68d5commit | diff
hw/intc/armv7m_nvic: Correct size of ICSR.VECTPENDING

The VECTPENDING field in the ICSR is 9 bits wide, in bits [20:12] of
the register.  We were incorrectly masking it to 8 bits, so it would
report the wrong value if the pending exception was greater than 256.
Fix the bug.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210723162146.5167-6-peter.maydell@linaro.org
hw/intc/armv7m_nvic.c diff | blob | blame | history
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