]> git.ipfire.org Git - thirdparty/qemu.git/commit
target/arm: Add isar_feature_aa64_fp_simd, isar_feature_aa32_vfp
authorRichard Henderson <richard.henderson@linaro.org>
Mon, 24 Feb 2020 22:22:19 +0000 (14:22 -0800)
committerPeter Maydell <peter.maydell@linaro.org>
Fri, 28 Feb 2020 16:14:57 +0000 (16:14 +0000)
commit7d63183ff1a61b3f7934dc9b40b10e4fd5e100cd
treec351fd20838de3aab376c8d9a78e2e8983f9eb65
parentf67957e17cbf8fc3cc5d1146a2db2023404578b0
target/arm: Add isar_feature_aa64_fp_simd, isar_feature_aa32_vfp

We cannot easily create "any" functions for these, because the
ID_AA64PFR0 fields for FP and SIMD signal "enabled" with zero.
Which means that an aarch32-only cpu will return incorrect results
when testing the aarch64 registers.

To use these, we must either have context or additionally test
vs ARM_FEATURE_AARCH64.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20200224222232.13807-5-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
target/arm/cpu.c
target/arm/cpu.h
target/arm/machine.c