PR81136: ICE from inconsistent DR_MISALIGNMENTs

PR81136: ICE from inconsistent DR_MISALIGNMENTs

The test case triggered this assert in vect_update_misalignment_for_peel:

      gcc_assert (DR_MISALIGNMENT (dr) / dr_size ==
                  DR_MISALIGNMENT (dr_peel) / dr_peel_size);

The problem was that:

- one memory reference guaranteed a high base alignment, when considering
  that reference in isolation.  This meant that we could calculate the
  vector misalignment for its DR at compile time.

- the other memory reference only guaranteed a low base alignment,
  when considering that reference in isolation.  We therefore couldn't
  calculate the vector misalignment for its DR at compile time.

- when looking at the values of the two addresses as a pair (rather
  than the memory references), it was obvious that they had the same
  misalignment, whatever that misalignment happened to be.

This is working as designed, so the patch restricts the assert to cases
in which both addresses have a compile-time misalignment.

In the test case this looks like a missed opportunity.  Both references
are unconditional, so it should be possible to use the highest of the
available base alignment guarantees when analyzing each reference.
A later patch does this, but the problem would still remain for
conditional references.

2017-07-02  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/
	PR tree-optimization/81136
	* tree-vect-data-refs.c (vect_update_misalignment_for_peel): Only
	assert that two references with the same misalignment have the same
	compile-time misalignment if those compile-time misalignments
	are known.

gcc/testsuite/
	PR tree-optimization/81136
	* gcc.dg/vect/pr81136.c: New test.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@249878 138bc75d-0d04-0410-961f-82ee72b054a4