ARC600 when configured with mul64 instructions uses mlo and mhi
registers to store the 64 result of the multiplication. In the ARC600
ISA documentation we have the next register configuration when ARC600
is configured only with mul64 extension:
Register | Name | Use
---------+------+------------------------------------
r57 | mlo | Multiply low 32 bits, read only
r58 | mmid | Multiply middle 32 bits, read only
r59 | mhi | Multiply high 32 bits, read only
-----------------------------------------------------
When used for Co-existence configurations we have for mul64 the next
registers used:
Register | Name | Use
---------+------+------------------------------------
r58 | mlo | Multiply low 32 bits, read only
r59 | mhi | Multiply high 32 bits, read only
-----------------------------------------------------
Note that mlo/mhi assignment doesn't swap when bigendian CPU
configuration is used.
The compiler will always use r58 for mlo, regardless of the
configuration choosen to ensure mlo/mhi correct splitting. Fixing mlo
to the right register number is done at assembly time. The dwarf info
is also notified via DBX_... macro. Both mlo/mhi registers needs to
saved when ISR happens using a custom sequence.