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crypto: xilinx - Add TRNG driver for Versal
authorHarsh Jain <h.jain@amd.com>
Mon, 25 Aug 2025 07:16:59 +0000 (12:46 +0530)
committerHerbert Xu <herbert@gondor.apana.org.au>
Sat, 6 Sep 2025 07:57:23 +0000 (15:57 +0800)
commit8979744aca8096ee5072798dfc1181606919b35d
tree9e3c7196d329024388aa766bd1cd686e4c0eb784tree | snapshot
parent9de9040ffc6a3c616a0b4c13c7d4d1c2778cb6eecommit | diff
crypto: xilinx - Add TRNG driver for Versal

Add True Random Number Generator(TRNG) driver for Versal
platform.

Co-developed-by: Mounika Botcha <mounika.botcha@amd.com>
Signed-off-by: Mounika Botcha <mounika.botcha@amd.com>
Signed-off-by: Harsh Jain <h.jain@amd.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
MAINTAINERS diff | blob | blame | history
drivers/crypto/Kconfig diff | blob | blame | history
drivers/crypto/xilinx/Makefile diff | blob | blame | history
drivers/crypto/xilinx/xilinx-trng.c [new file with mode: 0644] blob
Mirror https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git