]> git.ipfire.org Git - thirdparty/qemu.git/commit
target/mips: Revert TARGET_PAGE_BITS_VARY
authorRichard Henderson <richard.henderson@linaro.org>
Fri, 28 Mar 2025 17:55:24 +0000 (12:55 -0500)
committerMichael Tokarev <mjt@tls.msk.ru>
Sat, 5 Apr 2025 13:48:28 +0000 (16:48 +0300)
commit8a669b8aae632405b36f7477387ab506910dfb48
tree7cc706242eac378d0dfd17c36947daccbf0aaaf8
parentfa7638d8c117bf6c4fa68509c58e5765db2798d7
target/mips: Revert TARGET_PAGE_BITS_VARY

Revert ee3863b9d41 and a08d60bc6c2b.  The logic behind changing
the system page size because of what the Loongson kernel "prefers"
is flawed.

In the Loongson-2E manual, section 5.5, it is clear that the cpu
supports a 4k page size (along with many others).  Similarly for
the Loongson-3 series CPUs, the 4k page size is mentioned in the
section 7.7 (PageMask Register).  Therefore we must continue to
support a 4k page size.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20250328175526.368121-2-richard.henderson@linaro.org>
[PMD: Mention Loongson-3 series CPUs]
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
(cherry picked from commit fca2817fdcb00e65020c2dcfcb0b23b2a20ea3c4)
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
hw/mips/fuloong2e.c
hw/mips/loongson3_virt.c
target/mips/cpu-param.h
target/mips/tcg/sysemu/cp0_helper.c
target/mips/tcg/sysemu/tlb_helper.c