]> git.ipfire.org Git - thirdparty/qemu.git/commit
aspeed/soc: Support I2C for AST2700
authorJamin Lin <jamin_lin@aspeedtech.com>
Tue, 3 Sep 2024 08:35:26 +0000 (16:35 +0800)
committerCédric Le Goater <clg@redhat.com>
Mon, 16 Sep 2024 15:44:08 +0000 (17:44 +0200)
commit8ac116cc64486da150c3b1d57b5413fd10100353
tree9eeda72eed7da3ac52055a9bf1324aaebf640e47
parent1279f94591176b21bb290cb0b622f9b9478c1926
aspeed/soc: Support I2C for AST2700

Add I2C model for AST2700 I2C support.
The I2C controller registers base address is start at
0x14C0_F000 and its address space is 0x2000.

The AST2700 I2C controller has one source INTC per bus.
I2C buses interrupt are connected to GICINT130_INTC
from bit 0 to bit 15.
I2C bus 0 is connected to GICINT130_INTC at bit 0.
I2C bus 15 is connected to GICINT130_INTC at bit 15.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
hw/arm/aspeed_ast27x0.c