]> git.ipfire.org Git - thirdparty/qemu.git/commit
target/riscv: Ignore the pc bits above XLEN
authorLIU Zhiwei <zhiwei_liu@c-sky.com>
Thu, 20 Jan 2022 12:20:33 +0000 (20:20 +0800)
committerAlistair Francis <alistair.francis@wdc.com>
Fri, 21 Jan 2022 05:52:57 +0000 (15:52 +1000)
commit8c796f1a15d0fca41c4f3e985bfbd33a5afb9ddc
tree54c8dc595799f212b8474d7adaeb0ed5acc39a4e
parent440544e1cff9877cdf17aae4ecfe775410b1eff2
target/riscv: Ignore the pc bits above XLEN

The read from PC for translation is in cpu_get_tb_cpu_state, before translation.

Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20220120122050.41546-7-zhiwei_liu@c-sky.com
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
target/riscv/cpu_helper.c