]> git.ipfire.org Git - thirdparty/gcc.git/commit
RISC-V: Support VLS modes mask operations
authorJuzhe-Zhong <juzhe.zhong@rivai.ai>
Thu, 14 Sep 2023 12:43:58 +0000 (20:43 +0800)
committerPan Li <pan2.li@intel.com>
Thu, 14 Sep 2023 14:28:01 +0000 (22:28 +0800)
commit8ebb02dd6c9d190c84bf40259201e8e7327291f8
treebf475c9dcd95c2fd03924611e396af3c984785a4
parent557a858f2ead4ae8b64b157d7fd33830a81646d5
RISC-V: Support VLS modes mask operations

This patch support mask operations (comparison and logical).

This patch reduce these FAILs of "vect" testsuite:
FAIL: gcc.dg/vect/vect-bic-bitmask-12.c -flto -ffat-lto-objects  scan-tree-dump dce7 "<=\\s*.+{ 255,.+}"
FAIL: gcc.dg/vect/vect-bic-bitmask-12.c scan-tree-dump dce7 "<=\\s*.+{ 255,.+}"
FAIL: gcc.dg/vect/vect-bic-bitmask-23.c -flto -ffat-lto-objects  scan-tree-dump dce7 "<=\\s*.+{ 255, 15, 1, 65535 }"
FAIL: gcc.dg/vect/vect-bic-bitmask-23.c scan-tree-dump dce7 "<=\\s*.+{ 255, 15, 1, 65535 }"

Full regression passed (with reducing 4 FAILs).

gcc/ChangeLog:

* config/riscv/autovec-opt.md: Add VLS mask modes.
* config/riscv/autovec.md (@vcond_mask_<mode><vm>): Remove @.
(vcond_mask_<mode><vm>): Add VLS mask modes.
* config/riscv/vector.md: Ditto.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/vls/def.h: Add VLS tests.
* gcc.target/riscv/rvv/autovec/vls/cmp-1.c: New test.
* gcc.target/riscv/rvv/autovec/vls/cmp-2.c: New test.
* gcc.target/riscv/rvv/autovec/vls/cmp-3.c: New test.
* gcc.target/riscv/rvv/autovec/vls/cmp-4.c: New test.
* gcc.target/riscv/rvv/autovec/vls/cmp-5.c: New test.
* gcc.target/riscv/rvv/autovec/vls/cmp-6.c: New test.
* gcc.target/riscv/rvv/autovec/vls/mask-1.c: New test.
* gcc.target/riscv/rvv/autovec/vls/mask-2.c: New test.
* gcc.target/riscv/rvv/autovec/vls/mask-3.c: New test.
13 files changed:
gcc/config/riscv/autovec-opt.md
gcc/config/riscv/autovec.md
gcc/config/riscv/vector.md
gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cmp-1.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cmp-2.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cmp-3.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cmp-4.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cmp-5.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/cmp-6.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/def.h
gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mask-1.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mask-2.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mask-3.c [new file with mode: 0644]