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riscv: mbv: Align addresses with default DT
authorMichal Simek <michal.simek@amd.com>
Wed, 14 Feb 2024 11:52:29 +0000 (12:52 +0100)
committerMichal Simek <michal.simek@amd.com>
Fri, 1 Mar 2024 07:41:38 +0000 (08:41 +0100)
commit8ef750872e33217e174387dc5b8db6d2d8650583
tree44edfefc7e5830c27228cee8ea8728bb3d999388tree | snapshot
parent11f54dff3049c8490d5ac1883b1f98566c98ee90commit | diff
riscv: mbv: Align addresses with default DT

Better to align everything with memory map described in DT to avoid
mistakes. Execute both modes form the same address to make address map more
understandable.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/be54c668d5626ccd702507a86c2a95d1eaefc690.1707911544.git.michal.simek@amd.com
board/xilinx/mbv/Kconfig diff | blob | blame | history
configs/xilinx_mbv32_defconfig diff | blob | blame | history
configs/xilinx_mbv32_smode_defconfig diff | blob | blame | history
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