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RISC-V: Add RISC-V SBI PMU extension definitions
authorAtish Patra <atish.patra@wdc.com>
Sat, 19 Feb 2022 00:46:56 +0000 (16:46 -0800)
committerPalmer Dabbelt <palmer@rivosinc.com>
Mon, 21 Mar 2022 21:58:29 +0000 (14:58 -0700)
commit90beae5185c260074db409241247630036cf93a0
tree3f855ffa46d79f1ec02415757d0f3f67d3e1c86etree
parent9b3e150e310ee71d7bae1e31c38a300cfa5e951bcommit | diff
RISC-V: Add RISC-V SBI PMU extension definitions

This patch adds all the definitions defined by the SBI PMU extension.

Reviewed-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
arch/riscv/include/asm/sbi.h diff | blob | blame | history
Mirror https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git