]> git.ipfire.org Git - thirdparty/kernel/stable.git/commit
RISC-V: add vector extension validation checks
authorConor Dooley <conor.dooley@microchip.com>
Wed, 12 Mar 2025 13:11:44 +0000 (13:11 +0000)
committerAlexandre Ghiti <alexghiti@rivosinc.com>
Tue, 25 Mar 2025 14:10:08 +0000 (14:10 +0000)
commit9324571e9eea231321acf0a3d0fbc85a6e0f6ff6
tree73a7c953820cd4e174ae90523b6db014739a6dba
parent4701f33a10702d5fc577c32434eb62adde0a1ae1
RISC-V: add vector extension validation checks

Using Clement's new validation callbacks, support checking that
dependencies have been satisfied for the vector extensions. From the
kernel's perfective, it's not required to differentiate between the
conditions for all the various vector subsets - it's the firmware's job
to not report impossible combinations. Instead, the kernel only has to
check that the correct config options are enabled and to enforce its
requirement of the d extension being present for FPU support.

Since vector will now be disabled proactively, there's no need to clear
the bit in elf_hwcap in riscv_fill_hwcap() any longer.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Alexandre Ghiti <alexghiti@rivosinc.com>
Link: https://lore.kernel.org/r/20250312-eclair-affluent-55b098c3602b@spud
Signed-off-by: Alexandre Ghiti <alexghiti@rivosinc.com>
arch/riscv/include/asm/cpufeature.h
arch/riscv/kernel/cpufeature.c