RISC-V: Add testcases for scalar unsigned SAT_ADD form 5

RISC-V: Add testcases for scalar unsigned SAT_ADD form 5

After the middle-end support the form 5 of unsigned SAT_ADD and
the RISC-V backend implement the scalar .SAT_ADD, add more test
case to cover the form 5 of unsigned .SAT_ADD.

Form 5:
  #define SAT_ADD_U_5(T) \
  T sat_add_u_5_##T(T x, T y) \
  { \
    return (T)(x + y) < x ? -1 : (x + y); \
  }

Passed the riscv fully regression tests.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/sat_arith.h: Add test macro for form 5.
	* gcc.target/riscv/sat_u_add-21.c: New test.
	* gcc.target/riscv/sat_u_add-22.c: New test.
	* gcc.target/riscv/sat_u_add-23.c: New test.
	* gcc.target/riscv/sat_u_add-24.c: New test.
	* gcc.target/riscv/sat_u_add-run-21.c: New test.
	* gcc.target/riscv/sat_u_add-run-22.c: New test.
	* gcc.target/riscv/sat_u_add-run-23.c: New test.
	* gcc.target/riscv/sat_u_add-run-24.c: New test.

Signed-off-by: Pan Li <pan2.li@intel.com>