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target/openrisc: Keep SR_CY and SR_OV in a separate variables
authorRichard Henderson <rth@twiddle.net>
Wed, 18 Feb 2015 21:26:26 +0000 (13:26 -0800)
committerRichard Henderson <rth@twiddle.net>
Mon, 13 Feb 2017 21:14:59 +0000 (08:14 +1100)
commit9745807191a81c45970f780166f44a7f93b18653
tree426a6b0c6b8fe6576c3d564e3bb0672ab794101ctree
parent84775c43f390d4f5dd9adf8732e7e0b6deed8f61commit | diff
target/openrisc: Keep SR_CY and SR_OV in a separate variables

This significantly streamlines carry and overflow production.

Signed-off-by: Richard Henderson <rth@twiddle.net>
target/openrisc/cpu.h diff | blob | blame | history
target/openrisc/exception_helper.c diff | blob | blame | history
target/openrisc/helper.h diff | blob | blame | history
target/openrisc/translate.c diff | blob | blame | history
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