]> git.ipfire.org Git - thirdparty/qemu.git/commit
hw/dma: Add SiFive platform DMA controller emulation
authorBin Meng <bin.meng@windriver.com>
Tue, 1 Sep 2020 01:39:04 +0000 (09:39 +0800)
committerAlistair Francis <alistair.francis@wdc.com>
Wed, 9 Sep 2020 22:54:18 +0000 (15:54 -0700)
commit97ba42230b28636e02ab0af77738bb247e051dd4
tree3729a707093e871611f7c005a9c000233dd0bf9a
parent898dc008e8cd474c21f98a63f151265673aea305
hw/dma: Add SiFive platform DMA controller emulation

Microchip PolarFire SoC integrates a DMA engine that supports:
* Independent concurrent DMA transfers using 4 DMA channels
* Generation of interrupts on various conditions during execution
which is actually an IP reused from the SiFive FU540 chip.

This creates a model to support both polling and interrupt modes.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <1598924352-89526-10-git-send-email-bmeng.cn@gmail.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
hw/dma/Kconfig
hw/dma/meson.build
hw/dma/sifive_pdma.c [new file with mode: 0644]
include/hw/dma/sifive_pdma.h [new file with mode: 0644]