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(parent: 7175a56) | patch
hw/arm/xilinx_zynq: Fix IRQ/FIQ routing
authorSebastian Huber <sebastian.huber@embedded-brains.de>
Tue, 18 Jun 2024 15:22:21 +0000 (16:22 +0100)
committerPeter Maydell <peter.maydell@linaro.org>
Fri, 21 Jun 2024 13:01:58 +0000 (14:01 +0100)
commit9b113a09ff34857d463c130faa873c7b6fc4a004
tree04cf73d4107a855c699624eca5cc2c85a36aa8e0tree
parent7175a562f157d39725ab396e39c1e8e410d206b3commit | diff
hw/arm/xilinx_zynq: Fix IRQ/FIQ routing

Fix the system bus interrupt line to CPU core assignment.

Fixes: ddcf58e044ce0 ("hw/arm/xilinx_zynq: Support up to two CPU cores")
Signed-off-by: Sebastian Huber <sebastian.huber@embedded-brains.de>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20240610052906.4432-1-sebastian.huber@embedded-brains.de
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
hw/arm/xilinx_zynq.c diff | blob | blame | history
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