aarch64: PR target/PR99195 Annotate more simple integer binary patterns with vcz...

aarch64: PR target/PR99195 Annotate more simple integer binary patterns with vcz subst rules

This patch adds more straightforward annotations to some more integer binary ops to
eliminate redundant fmovs around 64-bit SIMD results.

Bootstrapped and tested on aarch64-none-linux.

gcc/ChangeLog:

	PR target/99195
	* config/aarch64/aarch64-simd.md (orn<mode>3): Rename to...
	(orn<mode>3<vczle><vczbe>): ... This.
	(bic<mode>3): Rename to...
	(bic<mode>3<vczle><vczbe>): ... This.
	(<su><maxmin><mode>3): Rename to...
	(<su><maxmin><mode>3<vczle><vczbe>): ... This.

gcc/testsuite/ChangeLog:

	PR target/99195
	* gcc.target/aarch64/simd/pr99195_1.c: Add tests for orn, bic, max and min.