]> git.ipfire.org Git - thirdparty/gcc.git/commit
RISC-V: Bugfix for RVV overloaded intrinsic ICE in function checker
authorPan Li <pan2.li@intel.com>
Wed, 7 Feb 2024 08:34:46 +0000 (16:34 +0800)
committerPan Li <pan2.li@intel.com>
Thu, 8 Feb 2024 06:51:44 +0000 (14:51 +0800)
commit9ec08782b45869b33fec2a8772c25118221208e3
tree75d506f09a4e4831999d9f4bc962fd80c29a9c4e
parentbfd72bb44eca83b0db2b0bab895f27a8a44247a2
RISC-V: Bugfix for RVV overloaded intrinsic ICE in function checker

There is another corn case when similar as below example:

void test (void)
{
  __riscv_vaadd ();
}

We report error when overloaded function with empty args.  For example:

test.c: In function 'foo':
test.c:8:3: error: no matching function call to '__riscv_vaadd' with empty args
    8 |   __riscv_vaadd ();
      |   ^~~~~~~~~~~~~~~~~~~~

Unfortunately, it will meet another ICE similar to below after above
message.  The underlying build function checker will have zero args
and break some assumption of the function checker.  For example, the
count of args is not less than 2.

ice.c: In function ‘foo’:
ice.c:8:3: internal compiler error: in require_immediate, at
config/riscv/riscv-vector-builtins.cc:4252
    8 |   __riscv_vaadd ();
      |   ^~~~~~~~~~~~~
0x20b36ac riscv_vector::function_checker::require_immediate(unsigned
int, long, long) const
        .../__RISC-V_BUILD__/../gcc/config/riscv/riscv-vector-builtins.cc:4252
0x20b890c riscv_vector::alu_def::check(riscv_vector::function_checker&) const
        .../__RISC-V_BUILD__/../gcc/config/riscv/riscv-vector-builtins-shapes.cc:387
0x20b38d7 riscv_vector::function_checker::check()
        .../__RISC-V_BUILD__/../gcc/config/riscv/riscv-vector-builtins.cc:4315
0x20b4876 riscv_vector::check_builtin_call(unsigned int, vec<unsigned int, va_heap, vl_ptr>,
        .../__RISC-V_BUILD__/../gcc/config/riscv/riscv-vector-builtins.cc:4605
0x2069393 riscv_check_builtin_call
        .../__RISC-V_BUILD__/../gcc/config/riscv/riscv-c.cc:227

Below test are passed for this patch.

* The riscv regression tests.

PR target/113766

gcc/ChangeLog:

* config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Make
sure the c.arg_num is >= 2 before checking.
(struct build_frm_base): Ditto.
(struct narrow_alu_def): Ditto.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/base/pr113766-1.c: Add new cases.

Signed-off-by: Pan Li <pan2.li@intel.com>
gcc/config/riscv/riscv-vector-builtins-shapes.cc
gcc/testsuite/gcc.target/riscv/rvv/base/pr113766-1.c