RISC-V: Keep vlmax vector operators in simple form until split1 pass

RISC-V: Keep vlmax vector operators in simple form until split1 pass

This patch keep vlmax vector pattern in simple before split1 pass which
will allow more optimization (e.g. combine) before split1 pass.
This patch changes the vlmax pattern in autovec.md to define_insn_and_split
as much as possible and clean up some combine patterns that are no longer needed.
This patch also fixed PR111232 bug which was caused by a combined failed.

	PR target/111232

gcc/ChangeLog:

	* config/riscv/autovec-opt.md (@pred_single_widen_mul<any_extend:su><mode>):
	Delete.
	(*pred_widen_mulsu<mode>): Delete.
	(*pred_single_widen_mul<mode>): Delete.
	(*dual_widen_<any_widen_binop:optab><any_extend:su><mode>):
	Add new combine patterns.
	(*single_widen_sub<any_extend:su><mode>): Ditto.
	(*single_widen_add<any_extend:su><mode>): Ditto.
	(*single_widen_mult<any_extend:su><mode>): Ditto.
	(*dual_widen_mulsu<mode>): Ditto.
	(*dual_widen_mulus<mode>): Ditto.
	(*dual_widen_<optab><mode>): Ditto.
	(*single_widen_add<mode>): Ditto.
	(*single_widen_sub<mode>): Ditto.
	(*single_widen_mult<mode>): Ditto.
	* config/riscv/autovec.md (<optab><mode>3):
	Change define_expand to define_insn_and_split.
	(<optab><mode>2): Ditto.
	(abs<mode>2): Ditto.
	(smul<mode>3_highpart): Ditto.
	(umul<mode>3_highpart): Ditto.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/autovec/widen/widen-4.c: Add more testcases.
	* gcc.target/riscv/rvv/autovec/widen/widen-complicate-4.c: Ditto.
	* gcc.target/riscv/rvv/autovec/pr111232.c: New test.