RISC-V: Remove redundant vcond patterns

RISC-V: Remove redundant vcond patterns

Previously, Richi has suggested that vcond patterns are only needed when target
support comparison + select consuming 1 instruction.

Now, I do the experiments on removing those "vcond" patterns, it works perfectly.

All testcases PASS.

Really appreicate Richi helps us recognize such issue.

Now remove all "vcond" patterns as Richi suggested.

gcc/ChangeLog:

	* config/riscv/autovec.md (vcond<V:mode><VI:mode>): Remove redundant
	vcond patterns.
	(vcondu<V:mode><VI:mode>): Ditto.
	* config/riscv/riscv-protos.h (expand_vcond): Ditto.
	* config/riscv/riscv-v.cc (expand_vcond): Ditto.