]> git.ipfire.org Git - thirdparty/gcc.git/commit
aarch64 - PR target/86887 Fix missing register constraints in carryin patterns
authorrearnsha <rearnsha@138bc75d-0d04-0410-961f-82ee72b054a4>
Thu, 9 Aug 2018 13:39:17 +0000 (13:39 +0000)
committerrearnsha <rearnsha@138bc75d-0d04-0410-961f-82ee72b054a4>
Thu, 9 Aug 2018 13:39:17 +0000 (13:39 +0000)
commita2809afdf9560accb06cdb595ce20e32f652a75c
tree22a225d6fa78251c77914063f23d64ce3e255168
parent443b054bd531a92560dce2f06f18bd67f65f2df0
aarch64 - PR target/86887 Fix missing register constraints in carryin patterns

Some of the carryin insn patterns are missing a register constraint.
That means that the register allocator can pick practically anything
to hold that value, including memory locations, or registers of the
wrong class.

PR target/86887
* config/aarch64/aarch64.md (add<mode>3_carryinC_zero): Add missing
register constraint to operand 0.
(add<mode>3_carryinC): Likewise.
(add<mode>3_carryinV_zero, add<mode>3_carryinV): Likewise.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@263446 138bc75d-0d04-0410-961f-82ee72b054a4
gcc/ChangeLog
gcc/config/aarch64/aarch64.md