]> git.ipfire.org Git - thirdparty/kernel/stable.git/commit
arm64: dts: socionext: uniphier-pxs3: Add default PCI interrup controller address...
authorKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Fri, 22 Aug 2025 13:33:20 +0000 (15:33 +0200)
committerKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Sun, 31 Aug 2025 10:59:22 +0000 (12:59 +0200)
commita29bf0b10a1a7f51afb91c1ff9edd73b0ca1fd18
treea6f561112092469ce801919201780456f6c46a70
parent613fb0c8bd49df4fb28bca89aa5363856487096f
arm64: dts: socionext: uniphier-pxs3: Add default PCI interrup controller address cells

Add missing address-cells 0 to the PCI interrupt node to silence W=1
warning:

  uniphier-pxs3.dtsi:915.4-918.29: Warning (interrupt_map): /soc@0/pcie@66000000:interrupt-map:
    Missing property '#address-cells' in node /soc@0/pcie@66000000/legacy-interrupt-controller, using 0 as fallback

Value '0' is correct because:
1. GIC interrupt controller does not have children,
2. interrupt-map property (in PCI node) consists of five components and
   the fourth component "parent unit address", which size is defined by
   '#address-cells' of the node pointed to by the interrupt-parent
   component, is not used (=0)

Reviewed-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Link: https://lore.kernel.org/r/20250822133318.312232-4-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi