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RISC-V: Libitm add RISC-V support.
authorXiongchuan Tan <xc-tan@outlook.com>
Mon, 31 Oct 2022 22:16:26 +0000 (16:16 -0600)
committerJeff Law <jlaw@ventanamicro.com>
Mon, 31 Oct 2022 22:19:29 +0000 (16:19 -0600)
commita3b58f28b8cbf524ae2417e1cb1813864a1d8a5d
treecd1e34ad063e15375b43f0f92ee08afc7fda4f3atree | snapshot
parentdb55f1dda2692c3f778ae783bc7121891c79aec4commit | diff
RISC-V: Libitm add RISC-V support.

Reviewed-by: Palmer Dabbelt <palmer@rivosinc.com>
Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
libitm/ChangeLog:

* configure.tgt: Add riscv support.
* config/riscv/asm.h: New file.
* config/riscv/sjlj.S: New file.
* config/riscv/target.h: New file.
libitm/config/riscv/asm.h [new file with mode: 0644] blob
libitm/config/riscv/sjlj.S [new file with mode: 0644] blob
libitm/config/riscv/target.h [new file with mode: 0644] blob
libitm/configure.tgt diff | blob | blame | history
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