]> git.ipfire.org Git - thirdparty/gcc.git/commit
RISC-V: Add test for vec_duplicate + vdiv.vv combine case 0 with GR2VR cost 0, 2...
authorPan Li <pan2.li@intel.com>
Mon, 2 Jun 2025 09:01:27 +0000 (17:01 +0800)
committerPan Li <pan2.li@intel.com>
Tue, 3 Jun 2025 14:15:46 +0000 (22:15 +0800)
commita5222407c993c01dcce53590c5fa799f7a927b4f
tree535f55ddeddc1eb858f7cd50a23a410dbee9e870
parent451737734b8913c5de8cfe597d5d20477af6c5ef
RISC-V: Add test for vec_duplicate + vdiv.vv combine case 0 with GR2VR cost 0, 2 and 15

Add asm dump check test for vec_duplicate + vdiv.vv combine to vdiv.vx,
with the GR2VR cost is 0, 2 and 15.

The below test suites are passed for this patch.
* The rv64gcv fully regression test.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i16.c: Add asm check
for vdiv.vx combine.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i32.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i64.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i8.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i16.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i32.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i64.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i8.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i16.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i32.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i64.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i8.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx_binary_data.h: Add test
data for vdiv run test.
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vdiv-run-1-i16.c: New test.
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vdiv-run-1-i32.c: New test.
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vdiv-run-1-i64.c: New test.
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vdiv-run-1-i8.c: New test.

Signed-off-by: Pan Li <pan2.li@intel.com>
17 files changed:
gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i16.c
gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i32.c
gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i64.c
gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i8.c
gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i16.c
gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i32.c
gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i64.c
gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i8.c
gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i16.c
gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i32.c
gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i64.c
gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i8.c
gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_binary_data.h
gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vdiv-run-1-i16.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vdiv-run-1-i32.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vdiv-run-1-i64.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vdiv-run-1-i8.c [new file with mode: 0644]