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aspeed/i2c: Check SRAM enablement on AST2500
authorCédric Le Goater <clg@kaod.org>
Tue, 19 Nov 2019 14:11:56 +0000 (15:11 +0100)
committerPeter Maydell <peter.maydell@linaro.org>
Mon, 16 Dec 2019 10:46:34 +0000 (10:46 +0000)
commitaab90b1cacb8b808d4f00c9709595c50b9d1f7a2
tree0f430c7d9e6afe9ef146ccd3662410d3a3943bb0tree
parent6054fc73e8f4acaafa63b4616e39414e53bce9a9commit | diff
aspeed/i2c: Check SRAM enablement on AST2500

The SRAM must be enabled before using the Buffer Pool mode or the DMA
mode. This is not required on other SoCs.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Tested-by: Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Message-id: 20191119141211.25716-3-clg@kaod.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
hw/i2c/aspeed_i2c.c diff | blob | blame | history
include/hw/i2c/aspeed_i2c.h diff | blob | blame | history
Mirror of https://git.qemu.org/git/qemu.git