hw/arm/xlnx-versal: crl: refactor creation

hw/arm/xlnx-versal: crl: refactor creation

Refactor the CRL device creation using the VersalMap structure. The
connections to the RPU CPUs are temporarily removed and will be
reintroduced with next refactoring commits.

Signed-off-by: Luc Michel <luc.michel@amd.com>
Reviewed-by: Francisco Iglesias <francisco.iglesias@amd.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com>
Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20250926070806.292065-19-luc.michel@amd.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>