RISC-V: remove param riscv-vector-abi. [PR113538]

RISC-V: remove param riscv-vector-abi. [PR113538]

Also adjust some of the tests for scan-assembly. The behavior is the
same as --param=riscv-vector-abi before.

gcc/ChangeLog:

	PR target/113538
	* config/riscv/riscv.cc (riscv_get_arg_info): Remove the flag.
	(riscv_fntype_abi): Ditto.
	* config/riscv/riscv.opt: Ditto.

gcc/testsuite/ChangeLog:

	PR target/113538
	* gcc.dg/vect/costmodel/riscv/rvv/dynamic-lmul1-7.c: Fix the asm
	check.
	* gcc.target/riscv/rvv/base/abi-call-args-1-run.c: Ditto.
	* gcc.target/riscv/rvv/base/abi-call-args-1.c: Ditto.
	* gcc.target/riscv/rvv/base/abi-call-args-2-run.c: Ditto.
	* gcc.target/riscv/rvv/base/abi-call-args-2.c: Ditto.
	* gcc.target/riscv/rvv/base/abi-call-args-3-run.c: Ditto.
	* gcc.target/riscv/rvv/base/abi-call-args-3.c: Ditto.
	* gcc.target/riscv/rvv/base/abi-call-args-4-run.c: Ditto.
	* gcc.target/riscv/rvv/base/abi-call-args-4.c: Ditto.
	* gcc.target/riscv/rvv/base/abi-call-error-1.c: Ditto.
	* gcc.target/riscv/rvv/base/abi-call-return-run.c: Ditto.
	* gcc.target/riscv/rvv/base/abi-call-return.c: Ditto.
	* gcc.target/riscv/rvv/base/abi-call-variant_cc.c: Ditto.
	* gcc.target/riscv/rvv/base/abi-callee-saved-1-fixed-1.c: Ditto.
	* gcc.target/riscv/rvv/base/abi-callee-saved-1-fixed-2.c: Ditto.
	* gcc.target/riscv/rvv/base/abi-callee-saved-1-save-restore.c: Ditto.
	* gcc.target/riscv/rvv/base/abi-callee-saved-1-zcmp.c: Ditto.
	* gcc.target/riscv/rvv/base/abi-callee-saved-1.c: Ditto.
	* gcc.target/riscv/rvv/base/abi-callee-saved-2-save-restore.c: Ditto.
	* gcc.target/riscv/rvv/base/abi-callee-saved-2-zcmp.c: Ditto.
	* gcc.target/riscv/rvv/base/abi-callee-saved-2.c: Ditto.
	* gcc.target/riscv/rvv/base/float-point-dynamic-frm-69.c: Ditto.
	* gcc.target/riscv/rvv/base/float-point-dynamic-frm-70.c: Ditto.
	* gcc.target/riscv/rvv/base/float-point-dynamic-frm-71.c: Ditto.
	* gcc.target/riscv/rvv/base/misc_vreinterpret_vbool_vint.c: Ditto.
	* gcc.target/riscv/rvv/base/overloaded_rv32_vadd.c: Ditto.
	* gcc.target/riscv/rvv/base/overloaded_rv32_vfadd.c: Ditto.
	* gcc.target/riscv/rvv/base/overloaded_rv32_vget_vset.c: Ditto.
	* gcc.target/riscv/rvv/base/overloaded_rv32_vloxseg2ei16.c: Ditto.
	* gcc.target/riscv/rvv/base/overloaded_rv32_vreinterpret.c: Ditto.
	* gcc.target/riscv/rvv/base/overloaded_rv64_vadd.c: Ditto.
	* gcc.target/riscv/rvv/base/overloaded_rv64_vfadd.c: Ditto.
	* gcc.target/riscv/rvv/base/overloaded_rv64_vget_vset.c: Ditto.
	* gcc.target/riscv/rvv/base/overloaded_rv64_vloxseg2ei16.c: Ditto.
	* gcc.target/riscv/rvv/base/overloaded_rv64_vreinterpret.c: Ditto.
	* gcc.target/riscv/rvv/base/spill-10.c: Ditto.
	* gcc.target/riscv/rvv/base/spill-11.c: Ditto.
	* gcc.target/riscv/rvv/base/spill-9.c: Ditto.
	* gcc.target/riscv/rvv/base/tuple_vundefined.c: Ditto.
	* gcc.target/riscv/rvv/base/vcreate.c: Ditto.
	* gcc.target/riscv/rvv/base/vlmul_ext-1.c: Ditto.
	* gcc.target/riscv/rvv/base/zvfh-over-zvfhmin.c: Ditto.
	* gcc.target/riscv/rvv/base/zvfhmin-intrinsic.c: Ditto.
	* lib/target-supports.exp: Remove the flag.

Signed-off-by: Yanzhang Wang <yanzhang.wang@intel.com>