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(parent: 47f4cdd) | patch
target/arm: Implement SME2 counted predicate register load/store
authorRichard Henderson <richard.henderson@linaro.org>
Fri, 4 Jul 2025 14:20:56 +0000 (08:20 -0600)
committerPeter Maydell <peter.maydell@linaro.org>
Fri, 4 Jul 2025 14:53:23 +0000 (15:53 +0100)
commitb0b0818a4a41ab10f1bd5fb5e2c0cd815ae3fee9
tree065a9e8e042b8ed0989cda6baedcff8bdd576794tree | snapshot
parent47f4cdd6c28755c7f1415ac38bc3350afaaee330commit | diff
target/arm: Implement SME2 counted predicate register load/store

Implement the SVE2p1 consecutive register LD1/ST1,
and the SME2 strided register LD1/ST1.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20250704142112.1018902-94-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
target/arm/tcg/helper-sve.h diff | blob | blame | history
target/arm/tcg/sve.decode diff | blob | blame | history
target/arm/tcg/sve_helper.c diff | blob | blame | history
target/arm/tcg/translate-sve.c diff | blob | blame | history
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