]> git.ipfire.org Git - thirdparty/gcc.git/commit
i386: Change mnemonics from V[ADDNE,DIVNE,MULNE,RCP,SUBNE]PBF16 to V[ADD,DIV,MUL...
authorHaochen Jiang <haochen.jiang@intel.com>
Thu, 23 Jan 2025 01:51:56 +0000 (09:51 +0800)
committerHaochen Jiang <haochen.jiang@intel.com>
Thu, 23 Jan 2025 01:51:56 +0000 (09:51 +0800)
commitb2667fca938c393579e6e4ae9144ff5111ee8b8f
tree178bddb0afddb0e94805968b6ccc5ea7a60d93ef
parenta19aca8afbf141bb550e9040135cc46387ce7f73
i386: Change mnemonics from V[ADDNE,DIVNE,MULNE,RCP,SUBNE]PBF16 to V[ADD,DIV,MUL,RCP,SUB]BF16

gcc/ChangeLog:

PR target/118270
* config/i386/avx10_2-512bf16intrin.h: Change intrin and builtin
name according to new mnemonics.
* config/i386/avx10_2bf16intrin.h: Ditto.
* config/i386/i386-builtin.def (BDESC): Ditto.
* config/i386/sse.md (div<mode>3): Adjust emit_insn.
(avx10_2_<insn>nepbf16_<mode><mask_name>): Rename to...
(avx10_2_<insn>bf16_<mode><mask_name>): ...this. Change
instruction name output.
(avx10_2_rcppbf16_<mode><mask_name>): Rename to...
(avx10_2_rcpbf16_<mode><mask_name>):...this. Change
instruction name output.

gcc/testsuite/ChangeLog:

PR target/118270
* gcc.target/i386/avx10_2-512-bf16-1.c: Adjust output and
intrin call.
* gcc.target/i386/avx10_2-512-bf-vector-operations-1.c: Move to ...
* gcc.target/i386/avx10_2-512-bf16-vector-operations-1.c: ...here.
Adjust asm check.
* gcc.target/i386/avx10_2-512-vaddnepbf16-2.c: Move to...
* gcc.target/i386/avx10_2-512-vaddbf16-2.c: ...here. Adjust
intrin call.
* gcc.target/i386/avx10_2-512-vdivnepbf16-2.c: Move to...
* gcc.target/i386/avx10_2-512-vdivbf16-2.c: ...here. Adjust
intrin call.
* gcc.target/i386/avx10_2-512-vmulnepbf16-2.c: Move to...
* gcc.target/i386/avx10_2-512-vmulbf16-2.c: ...here. Adjust
intrin call.
* gcc.target/i386/avx10_2-512-vrcppbf16-2.c: Move to...
* gcc.target/i386/avx10_2-512-vrcpbf16-2.c: ...here. Adjust
intrin call.
* gcc.target/i386/avx10_2-512-vsubnepbf16-2.c: Move to...
* gcc.target/i386/avx10_2-512-vsubbf16-2.c: ...here. Adjust
intrin call.
* gcc.target/i386/avx10_2-bf16-1.c: Adjust output and
intrin call.
* gcc.target/i386/avx10_2-bf-vector-operations-1.c: Move to ....
* gcc.target/i386/avx10_2-bf16-vector-operations-1.c: ...here.
Adjust asm check.
* gcc.target/i386/avx10_2-partial-bf-vector-fast-math-1.c: Move to...
* gcc.target/i386/avx10_2-partial-bf16-vector-fast-math-1.c: ...here.
Adjust asm check.
* gcc.target/i386/avx10_2-partial-bf-vector-operations-1.c: Move to...
* gcc.target/i386/avx10_2-partial-bf16-vector-operations-1.c: ...here.
Adjust asm check.
* gcc.target/i386/avx10_2-vaddnepbf16-2.c: Move to...
* gcc.target/i386/avx10_2-vaddbf16-2.c: ...here. Adjust intrin call.
* gcc.target/i386/avx10_2-vdivnepbf16-2.c: Move to...
* gcc.target/i386/avx10_2-vdivbf16-2.c: ...here. Adjust intrin call.
* gcc.target/i386/avx10_2-vmulnepbf16-2.c: Move to...
* gcc.target/i386/avx10_2-vmulbf16-2.c: ...here. Adjust intrin call.
* gcc.target/i386/avx10_2-vrcppbf16-2.c: Move to...
* gcc.target/i386/avx10_2-vrcpbf16-2.c: ...here. Adjust intrin call.
* gcc.target/i386/avx10_2-vsubnepbf16-2.c: Move to...
* gcc.target/i386/avx10_2-vsubbf16-2.c: ...here. Adjust intrin call.
* lib/target-supports.exp (check_effective_target_avx10_2):
Adjust asm usage.
(check_effective_target_avx10_2_512): Ditto.
24 files changed:
gcc/config/i386/avx10_2-512bf16intrin.h
gcc/config/i386/avx10_2bf16intrin.h
gcc/config/i386/i386-builtin.def
gcc/config/i386/sse.md
gcc/testsuite/gcc.target/i386/avx10_2-512-bf-vector-operations-1.c [deleted file]
gcc/testsuite/gcc.target/i386/avx10_2-512-bf16-1.c
gcc/testsuite/gcc.target/i386/avx10_2-512-bf16-vector-operations-1.c [new file with mode: 0644]
gcc/testsuite/gcc.target/i386/avx10_2-512-vaddbf16-2.c [moved from gcc/testsuite/gcc.target/i386/avx10_2-512-vaddnepbf16-2.c with 86% similarity]
gcc/testsuite/gcc.target/i386/avx10_2-512-vdivbf16-2.c [moved from gcc/testsuite/gcc.target/i386/avx10_2-512-vdivnepbf16-2.c with 86% similarity]
gcc/testsuite/gcc.target/i386/avx10_2-512-vmulbf16-2.c [moved from gcc/testsuite/gcc.target/i386/avx10_2-512-vmulnepbf16-2.c with 86% similarity]
gcc/testsuite/gcc.target/i386/avx10_2-512-vrcpbf16-2.c [moved from gcc/testsuite/gcc.target/i386/avx10_2-512-vrcppbf16-2.c with 100% similarity]
gcc/testsuite/gcc.target/i386/avx10_2-512-vsubbf16-2.c [moved from gcc/testsuite/gcc.target/i386/avx10_2-512-vsubnepbf16-2.c with 86% similarity]
gcc/testsuite/gcc.target/i386/avx10_2-bf-vector-operations-1.c [deleted file]
gcc/testsuite/gcc.target/i386/avx10_2-bf16-1.c
gcc/testsuite/gcc.target/i386/avx10_2-bf16-vector-operations-1.c [new file with mode: 0644]
gcc/testsuite/gcc.target/i386/avx10_2-partial-bf16-vector-fast-math-1.c [moved from gcc/testsuite/gcc.target/i386/avx10_2-partial-bf-vector-fast-math-1.c with 60% similarity]
gcc/testsuite/gcc.target/i386/avx10_2-partial-bf16-vector-operations-1.c [moved from gcc/testsuite/gcc.target/i386/avx10_2-partial-bf-vector-operations-1.c with 51% similarity]
gcc/testsuite/gcc.target/i386/avx10_2-vaddbf16-2.c [moved from gcc/testsuite/gcc.target/i386/avx10_2-vrcppbf16-2.c with 80% similarity]
gcc/testsuite/gcc.target/i386/avx10_2-vdivbf16-2.c [moved from gcc/testsuite/gcc.target/i386/avx10_2-vaddnepbf16-2.c with 79% similarity]
gcc/testsuite/gcc.target/i386/avx10_2-vmulbf16-2.c [moved from gcc/testsuite/gcc.target/i386/avx10_2-vdivnepbf16-2.c with 79% similarity]
gcc/testsuite/gcc.target/i386/avx10_2-vrcpbf16-2.c [moved from gcc/testsuite/gcc.target/i386/avx10_2-vmulnepbf16-2.c with 79% similarity]
gcc/testsuite/gcc.target/i386/avx10_2-vsubbf16-2.c [new file with mode: 0644]
gcc/testsuite/gcc.target/i386/avx10_2-vsubnepbf16-2.c [deleted file]
gcc/testsuite/lib/target-supports.exp