]> git.ipfire.org Git - thirdparty/qemu.git/commit
target/riscv: Implement privilege mode filtering for cycle/instret
authorAtish Patra <atishp@rivosinc.com>
Thu, 11 Jul 2024 22:31:10 +0000 (15:31 -0700)
committerAlistair Francis <alistair.francis@wdc.com>
Thu, 18 Jul 2024 02:08:44 +0000 (12:08 +1000)
commitb2d7a7c7e4e30fb5341d38deac968de675f9419c
treecb43938ffe2840b746896b1c4f24e62d6de675ad
parent3b31b7baff02b357a6c921b26ae953e04d0cfdbb
target/riscv: Implement privilege mode filtering for cycle/instret

Privilege mode filtering can also be emulated for cycle/instret by
tracking host_ticks/icount during each privilege mode switch. This
patch implements that for both cycle/instret and mhpmcounters. The
first one requires Smcntrpmf while the other one requires Sscofpmf
to be enabled.

The cycle/instret are still computed using host ticks when icount
is not enabled. Otherwise, they are computed using raw icount which
is more accurate in icount mode.

Co-Developed-by: Rajnesh Kanwal <rkanwal@rivosinc.com>
Signed-off-by: Rajnesh Kanwal <rkanwal@rivosinc.com>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Message-ID: <20240711-smcntrpmf_v7-v8-7-b7c38ae7b263@rivosinc.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
target/riscv/cpu.h
target/riscv/cpu_helper.c
target/riscv/csr.c
target/riscv/pmu.c
target/riscv/pmu.h